Soi mosfet device having second gate electrodes for threshold voltage control

ABSTRACT

In order to apply a predetermined voltage to a silicon layer ( 3 ) to thereby control a threshold voltage, a second gate electrode ( 5 ) is provided on the surface of the silicon layer ( 3 ) with a gate oxide film (insulating layer) ( 4 ) interposed therebetween so as to fall within the same surface of the silicon layer ( 3 ) as a surface on which a source ( 7 ) and a drain ( 8 ) placed in the silicon layer ( 3 ) and a first gate electrode ( 6 ) are disposed.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a MOSFET (Metal OxideSemiconductor Field Effect Transistor) having an SOI (Silicon OnInsulator) structure, and particularly to control on variations inthreshold voltage.

[0003] 2. Description of the Related Art

[0004] A conventional SOI MOSFET device is provided with a siliconlayer, a buried oxide film, and a substrate. A first gate electrode, agate oxide film, a source, and a drain are formed and disposed on thesilicon layer.

[0005] Such a device structure has been accompanied by a problem that athreshold voltage varies due to variations in the thickness of thesilicon layer within a wafer surface. With a view toward correcting thevariations, there has been adopted a method of providing a wellelectrode made conductive to a well (silicon layer) within the well,modifying a bias voltage applied to the well electrode for each deviceand varying the potential of the silicon layer to thereby set thethreshold voltage to a desired value (e.g., see Japanese PatentApplication Laid-Open No. Hei 10(1998)-256560).

[0006] Since, however, the bias voltage applied to the well electrode isapplied between the drain and the substrate in such a device structure,only about 0.6V could be applied under such a condition that no currentflowed out in a forward bias state. Thus, a problem was left behind inthat the amount of change in threshold voltage was merely obtained onlya little.

[0007] With a view to greatly securing the amount of the change inthreshold voltage, there has been thus disclosed a method wherein afirst gate electrode is provided on an upper surface of a silicon layerwith a first oxide film interposed therebetween and a second gateelectrode is provided on a lower surface thereof with a second oxidefilm interposed therebetween, respectively, and a voltage forcontrolling the threshold voltage is applied to the first gate electrodeto thereby input a signal to its corresponding second electrode, or avoltage for controlling the threshold voltage is applied to the secondgate electrode to thereby input a signal to its corresponding firstelectrode, whereby the amount of change in threshold voltage is madegreat (e.g., see Japanese Patent Application Laid-Open No. Hei10(1998)-256560)

[0008] In addition to the above patent documents, there have beendisclosed a technology for providing thin-film SOI MOSFETs whose SOIs orgate oxide films are different in thickness, and providing an electrodeelectrically insulated from a silicon substrate on the silicon substrateof the specific SOI MOSFET thereof (see Japanese Patent ApplicationLaid-Open No. Hei 7(1995)-106579), a technology for forming a thin-filmSOI layer on a silicon substrate with a polysilicon film and a siliconoxide film interposed therebetween and configuring a CMOS circuit by useof the thin-film SOI layer (see Japanese Patent Application Laid-OpenNo. Hei 9(1997)-312401), etc.

[0009] A summary of the technology described in the patent documentreferred to above will be explained using a drawing.

[0010]FIG. 6 is a device structure diagram of a conventional SOI MOSFET.

[0011] As shown in the drawing, a silicon layer 102 is provided over asubstrate 100 with a buried oxide film 101 formed thereon interposedtherebetween. A first gate electrode 104 is provided over a surface ofthe silicon layer 102, which is located below as viewed in the drawingwith a first gate oxide film 103 interposed between the first gateelectrode 104 and a channel region in the buried oxide film 101.Further, a second gate electrode 106 is provided over a surface of thesilicon layer 102, which is located above as viewed in the drawing witha second gate oxide film 105 interposed between the second gateelectrode 106 and a channel region in the surface thereof. In such asemiconductor device, the first gate electrode 104 is driven as an inputsignal gate and the second gate electrode 106 is driven as for thresholdvoltage control. Alternatively, the second gate electrode 106 is drivenas the input signal gate and the first gate electrode 104 is driven asfor the threshold voltage control. Driving them in this way allows anincrease in the amount of change in threshold voltage.

[0012] Owing to the technology of Japanese Patent Application Laid-OpenNo. Hei 10(1998)-256560, the problem that the threshold voltage variesdue to the variations in the thickness of the silicon layer 102, couldbe solved by providing the first gate electrode and the second gateelectrode in the state of the silicon layer being therebetween asdescribed above, inputting the signal to either one of the gateelectrodes and applying the voltage for controlling the thresholdvoltage to the other gate electrode. Further, the amount of change inthreshold voltage could also be greatly ensured.

[0013] However, there has been left a problem to be solved that amanufacturing process becomes complex to provide the first gateelectrode and the second gate electrode on both sides thereofinterposing the silicon layer therebetween, and high-precisionprocessing (polishing or the like) is required.

[0014] An object of the present invention is to obtain a devicestructure capable of avoiding a manufacturing process from becomingcomplex, and increasing the amount of change in threshold voltage.

SUMMARY OF THE INVENTION

[0015] The present invention adopts the following configurations tosolve the foregoing.

[0016] A first invention provides an SOI MOSFET device characterized inthat a second gate electrode is provided on the surface of a siliconlayer with an insulating layer interposed between a first gate electrodefor a signal input and the silicon layer to apply a predeterminedvoltage to the silicon layer to thereby control a threshold voltage, insuch a manner as to be placed on the same surface of the silicon layeras a surface on which the first gate electrode is disposed.

[0017] A second invention provides an SOI MOSFET device characterized inthat in the SOI MOSFET device of the first invention, the second gateelectrode is provided in plural form.

[0018] A third invention provides an SOI MOSFET device characterized inthat in the SOI MOSFET device of the second invention, the second gateelectrodes are respectively provided at positions to intersect the firstgate electrode at both ends of the first gate electrode.

[0019] A fourth invention provides an SOI MOSFET device characterized inthat in the SOI MOSFET device of the second or third invention, voltageshaving different values are respectively applied to the respectivesecond gate electrodes.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] While the specification concludes with claims particularlypointing out and distinctly claiming the subject matter which isregarded as the invention, it is believed that the invention, theobjects and features of the invention and further objects, features andadvantages thereof will be better understood from the followingdescription taken in connection with the accompanying drawings in which:

[0021]FIG. 1 is a plane view of an SOI MOSFET showing a specific example1 of an embodiment of the present invention;

[0022]FIG. 2 is a cross-sectional view of the SOI MOSFET illustratingthe specific example 1 of the embodiment of the present invention;

[0023]FIG. 3 is a threshold voltage control characteristic diagram ofthe specific example 1 of the embodiment of the present invention;

[0024]FIG. 4 is a plane view of an SOI MOSFET illustrating a specificexample 2 of an embodiment of the present invention;

[0025]FIG. 5 is a cross-sectional view of the SOI MOSFET showing thespecific example 2 of the embodiment of the present invention; and

[0026]FIG. 6 is a cross-sectional view of an SOI MOSFET according to aprior art.

DETAILED DESCRIPTION OF THE INVENTION

[0027] Preferred embodiments of the present invention will hereinafterbe described using specific examples.

SPECIFIC EXAMPLE 1

[0028] In the present specific example, a second gate electrode to whicha voltage for controlling a threshold voltage is applied, is newlyprovided over the surface of a silicon layer with a gate oxide filminterposed therebetween. The second gate electrode iscapacitively-coupled to the silicon layer since the gate oxide film isinterposed between the second gate electrode and the silicon layer.Thus, when the dc voltage is applied to the second gate electrode, apositive or negative charge is inducted at a portion near the surface ofthe silicon layer.

[0029] In order to operate such a semiconductor device, a voltage—thedevice's original threshold voltage plus a voltage for canceling thepositive or negative charge must be applied to a first gate electrodefor a signal input. As a result, the threshold voltage can be correctedby changing the amount of the positive or negative charge, i.e., the dcvoltage applied to the second gate electrode.

[0030] Since the dc voltage applied to the second gate electrodes canassume both positive and negative forms, the range of correction of thethreshold voltage increases. Further, the second gate electrode isdisposed on the same surface of a silicon layer as a surface on whichboth a source and a drain and the first gate electrode in the siliconlayer are disposed. Therefore, there is no need to provide process stepssuch as turning over of upper and lower surfaces of a silicon wafer,etc. in a manufacturing process. A step for adding the second gateelectrode may be added to a normal SOI MOSFT manufacturing process.Thus, complication of the process can be avoided and high-precisionprocessing becomes unnecessary, thus no leading to a substantialincrease in cost. Such an SOI MOSFET device is configured in thefollowing manner.

[0031]FIG. 1 is a plane view of an SOI MOSFET device showing a specificexample 1, and FIG. 2 is a sectional structure diagram taken along lineA-A in FIG. 1, respectively.

[0032] In FIG. 2, the SOI MOSFET showing the specific example 1 has asubstrate 1, a buried oxide film 2, a silicon layer 3, a gate oxide film4, a second gate electrode 5, a first gate electrode 6, a source 7 and adrain 8.

[0033] A summary of a method of manufacturing the SOI MOSFET showing thespecific example 1 will first be explained.

[0034] First, oxygen is ion-implanted in a predetermined position(corresponding to a position where the buried oxide film 2 is formed) ofa silicon wafer as viewed its thickness direction. Heat-treating thesilicon wafer yields a silicon substrate made up of a substrate 1, aburied oxide film 2 and a silicon layer 3.

[0035] Next, the surface of the silicon layer 3 is oxidized to form agate oxide film 4.

[0036] Further, polysilicon or the like used as an electrode member islaminated on the gate oxide film 4, and removed by a photography andetching technology with only a portion to form the electrode member as asecond gate electrode being left behind.

[0037] According to this process, the corresponding second gateelectrode 5 is formed over the silicon layer 3. The second gateelectrode 5 is electrically capacitively-coupled to the silicon layer 3with the gate oxide film 4 interposed therebetween.

[0038] Subsequently, the gate oxide film 4 is formed on the second gateelectrode 5 by a CVD method or the like.

[0039] Next, the polysilicon or the like used as the electrode member islaminated on the gate oxide film 4. Further, such an electrode memberlayer is removed using a photoetching process or the like with only aportion to be formed as a first gate electrode 6 being left behind.According to this process, the first gate electrode 6 is formed on thesilicon layer 3.

[0040] The first gate electrode 6 is electrically capacitively-coupledto the silicon layer 3 with the gate oxide film 4 interposedtherebetween in a state of being insulated from the second gateelectrode 5. After such a process, a process perfectly similar to themanufacturing process of the conventional SOI MOSFET is executed.

[0041] Namely, a predetermined area is doped with an impurity such asboron or phosphor so that a source 7 and a drain 8 are formed.

[0042] Points to keep in mind here are as follows:

[0043] In the manufacturing process of the SOI MOSFET illustrative ofthe present specific example 1, the second gate electrode 5 is formedusing the process perfectly identical to the process for forming thefirst gate electrode 6 before the formation of the first gate electrode6.

[0044] Accordingly, there is no need to execute processes such asturning over of the upper and lower surfaces of the wafer, polishing ofits surface, etc. during the manufacturing process.

[0045] A control characteristic of the SOI MOSFET showing the specificexample 1, which has been fabricated through the processes describedabove, will be explained.

[0046]FIG. 3 is a control characteristic diagram of a threshold voltageof the specific example 1.

[0047] The horizontal axis thereof shows a second gate voltage (V) andthe vertical axis thereof represents a threshold voltage (V),respectively.

[0048] As described above, the second gate electrode 5 iscapacitively-coupled to the silicon layer 3. Namely, a condenser isconfigured wherein the second gate electrode 5 and the silicon layer 3are formed as upper and lower electrodes and the gate oxide film 4 usedas an insulating material or insulator is interposed therebetween. Thus,when a dc voltage is applied to the second gate electrode 5, a positiveor negative charge is induced at a portion near the surface of thesilicon layer 3.

[0049] The polarity of the induced charge results in inverted polarityof the dc voltage applied to the second gate electrode 5. The value ofthe dc voltage applied to the second gate electrode 5 is represented onthe horizontal axis as the second gate voltage (V). In order to operatethe present semiconductor device, a voltage—the device's originalvoltage plus a voltage for canceling the positive or negative chargeinduced by the second gate voltage (V) must be applied as plus to thefirst gate electrode 6. This voltage is represented on the vertical axisas the threshold voltage (V). As shown in the drawing, the thresholdvoltage drops substantially linearly as the second gate voltage (V)increases. It is understood that when the second gate voltage is changedfrom −3V to +3V, the threshold voltage is varied by 0.15V in the form ofan absolute value. It is understood from this point of view that the SOIMOSFET having the device structure of the specific example 1 is capableof reducing variations in characteristics between devices owing to theapplication of a predetermined dc voltage to the second gate electrodeprovided for each device.

[0050] However, when the second gate voltage is extremely increased, aleak current starts to flow between the source 7 and the drain 8.Consideration such as the placement of the second gate electrode 5 inthe neighborhood of a device isolation region 10 as shown in FIGS. 1 and2 is required to increase the threshold voltage at which the leakcurrent starts to flow.

[0051] Incidentally, according to experiments of the present inventors,inconvenience due to the second gate voltage was not detected inparticular within such a measuring range as shown in FIG. 3.

[0052] While the second gate electrode 5 is disposed round so as tosurround regions for the source 7 and the drain 8 in FIG. 1, the presentinvention is not limited to such an example. Namely, the second gateelectrode 5 may be disposed so as to cross the regions for the source 7and the drain 8. However, since the first gate electrode 6 is disposedover the second gate electrode 5 at portions where the second gateelectrode 5 intersects the first gate electrode 6, it does not functionas the first gate electrode 6.

[0053] Thus, when the second gate electrode 5 is disposed so as tosurround the regions for the source 7 and the drain 8 and cross bothends of the first gate electrode as shown in FIG. 1, the thresholdvoltage can be controlled most efficiently without deteriorating thefunction of the first gate electrode 6.

SPECIFIC EXAMPLE 2

[0054]FIG. 4 is a plane view of an SOI MOSFET device showing a specificexample 2, and FIG. 5 is a sectional structure diagram taken along lineA-A in FIG. 4, respectively.

[0055] In FIG. 5, the SOI MOSFET showing the specific example 2 has asubstrate 1, a buried oxide film 2, a silicon layer 3, a gate oxide film4, a first gate electrode 6, a source 7, a drain 8, a second gateelectrode 15-1, and a second gate electrode 15-2.

[0056] Only the difference between the specific example 1 and thespecific example 2 will be explained.

[0057] In the specific example 1, the second gate electrode 5 surroundsthe peripheries of the source 7 and the drain 8. Further, the secondgate electrode 5 intersects the first gate electrode 6 at the twopoints. On the other hand, in the present specific example, the secondgate electrode is divided into two of the second gate electrode 15-1 andthe second gate electrode 15-2.

[0058] The second gate electrode 15-1 and the second gate electrode 15-2respectively intersect once on both end sides of the first gateelectrode 6. Since other portions are perfectly identical to thespecific example 1, their description will be omitted.

[0059] Since different voltages are respectively applied to the secondgate electrode 15-1 and the second gate electrode 15-2 to thereby makeit possible to control a threshold voltage of the specific example 2,the specific example 2 allows a control method to have diversity. Thedifferent voltages described herein may be voltages of differentpolarities as well as voltages having different values.

[0060] Owing to the application of the predetermined voltages to thesilicon layer, and the provision of the second gate electrodes tocontrol the threshold voltage as described above, the followingadvantageous effects are obtained:

[0061] 1. It is possible to avoid complexity of a manufacturing processand increase the amount of change in threshold voltage.

[0062] 2. It is possible to carry out various control such as controlfor increasing a threshold voltage during standby of an LSI according tomodifications to the threshold voltage to thereby reduce a standbycurrent, control for lowering the threshold voltage during the operationof the LSI to thereby speed up the operation.

[0063] 3. Further, it is also possible to cause a control method to havediversity owing to the provision of the second gate electrode in pluralform.

[0064] While the present invention has been described with reference tothe illustrative embodiments, this description is not intended to beconstrued in a limiting sense. Various modifications of the illustrativeembodiments, as well as other embodiments of the invention, will beapparent to those skilled in the art on reference to this description.It is therefore contemplated that the appended claims will cover anysuch modifications or embodiments as fall within the true scope of theinvention.

What is claimed is:
 1. An SOI-structured MOSFET, comprising: a firstgate electrode for a signal input; and a second gate electrode forthreshold voltage control, said second gate electrode being provided ona surface of a silicon layer with an insulating layer interposed betweenthe first gate electrode and the silicon layer to apply a predeterminedvoltage to the silicon layer to thereby control a threshold voltage, insuch a manner so as to be placed on the same surface of the siliconlayer as a surface on which the first gate electrode is disposed.
 2. TheSOI MOSFET according to claim 1, wherein the second gate electrode isprovided in plural form.
 3. The SOI MOSFET according to claim 1, whereinthe second gate electrodes are respectively provided at positions tointersect the first gate electrode at both ends of the first gateelectrode.
 4. The SOI MOSFET according to claim 2, wherein voltageshaving different values are respectively applied to the respectivesecond gate electrodes.
 5. The SOI MOSFET according to claim 3, whereinvoltages having different values are respectively applied to therespective second gate electrodes.